1. Field of the Invention
The present invention relates to a semiconductor package and the method of making the same, and more particularly to a stacked semiconductor package and the method of making the same.
2. Description of the Related Art
FIGS. 1 to 7 are schematic views of each step of the method of making a conventional stacked semiconductor package. First, referring to FIG. 1, a first substrate 10 is provided. The first substrate 10 has a first surface 101 and a second surface 102. Afterward, a first chip 11 is mounted onto the first surface 101 of the first substrate 10, and is electrically connected to the first substrate 10 via a plurality of first wires 12.
In FIG. 2, a mold 13 is used to cover the first surface 101 of the first substrate 10. The mold 13 has a cavity 131 for accommodating the first chip 11 and the first wires 12.
As shown in FIG. 3, a molding process is performed to encapsulate the first chip 11 and the first wires 12 by injecting a first molding compound 14 into the cavity 131. Afterward, the mold 13 is removed.
In FIG. 4, a ball-mounting process is performed to form a plurality of first solder balls 15 on the first surface 101 of the first substrate 10, which is not covered by the first molding compound 14.
In FIG. 5, a second package 16 is provided. The second package comprises a second substrate 17, a second chip 18, a plurality of second wires 19, a second molding compound 20 and a plurality of third solder balls 21. The second substrate 17 has a first surface 171 and a second surface 172. The second chip 18 is electrically connected to the first surface 171 of the second substrate 17 via the second wires 19. The third solder balls 21 are disposed on the second surface 172 of the second substrate 17.
In FIG. 6, the third solder balls 21 are stacked on the first solder balls 15, and a reflow process is performed to form a plurality of fourth solder balls 22 by melting the third solder balls 21 and the first solder balls 15.
In FIG. 7, a plurality of second solder balls 23 is formed on the second surface 102 of the first substrate 10 to form a stacked package.
The conventional stacked package has the following disadvantages. In the above-mentioned molding process, the mold flush occurs easily, that is, the first molding compound 14 easily flush out of the cavity 131, and enters the space between the mold 13 and the first surface 101 of the first substrate 10. Therefore, the area for mounting the first solder balls 15 is polluted, causing the failure of the ball-mounting process and defects in the package. Moreover, the rigidity of the first substrate 10 is relatively low. After the third solder balls 171 and the first solder balls 15 are melted to form a plurality of fourth solder balls 22, a stress is produced on the first substrate 10. Therefore, the first substrate 10 is pulled so that warpage occurs.
Therefore, it is necessary to provide an innovative and advanced semiconductor package to solve the above problems.